MD5 speed improvement ideas

[IvanG]

There is MAD instruction (page 51) which performs multiplication and addition, so you can improve the bit rotation operation.

Unfortunately this won't work as integer MAD is just a virtual instruction. PTX isn't real assembler, so it may looks like you're optimizing some instructions but after real compilation to ISA you won't found anything good. As there even no 32-bit integer multiplication for G80-GT200 hardware MAD will be replaced by several 24-bit multiplications and additions (or even back to SHL+ADD if compiler will notice 2^n value).

And for Fermi usual rotate construction like
#define ROTATE(a,n) (((a)<<(n)) | ((a)>>(32-(n))))
will be automatically transformed into
#define ROTATE(a,n) (((a)<<(n)) + ((a)>>(32-(n))))
thus making "fused" SHL+ADD possible.

Shortly, NVCC compiler is smart enough to make rotates as fast as possible, no need for special actions from programmer.

But idea for MD5's 3rd round optimization was nice, never seen it before, thanks .