Ryzen OpenCL benchmarks?

[cpu_pirate]

I know the numbers will not compare to GPU's in any real form but for those who are looking to build a modest (1-4) GPU cluster it might be worthwhile to know what kind of numbers the new Ryzen r7 chips are putting up in hashcat, as well as any support for them or even lack of current support for that matter. I intend to purchase a few 1080Ti's for a new build in the next 4-6 weeks and am hoping someone can put up their benchmarks if Ryzen is supported to dictate my purchase from 1800x or 6800k.

[epixoip]

AMD dropped XOP from their ISA and failed to add 256bit registers, so Ryzen will be seriously shitty for password cracking. Much slower than Intel CPUs with AVX2.

[Flomac]

But Ryzen also comes with AVX2 and since you can get an 8-core CPU instead of a 4-core for the same money, there can be quite a difference. Like always, we'll have to wait and see.

[epixoip]

Are you sure? Last I saw they had dropped XOP and hadn't added any 256-bit registers. Now that I'm searching for this, I see lots of mixed reports: some say it has AVX2, other say it has no AVX2. I can't find any official source that states this definitively.

Edit: Ok I found cpuinfo output here: http://openbenchmarking.org/system/17030...0X/cpuinfo Looks like it does indeed have the AVX2 flag. Now I'm wondering if only certain Ryzen CPUs have AVX2 while others don't, or if the people saying it doesn't have AVX2 are just mistaken?

[Flomac]

Yeah, it's a bit strange.

On Anandtech:
"On the FP side there are four pipes (compared to three in previous designs) which support combined 128-bit FMAC instructions. These can be combined for one 256-bit AVX, but beyond that it has to be scheduled over multiple instructions."

Later in the same article it says:
"We have two MUL and two ADD in the FP unit, capable of joining to form two 128-bit FMACs, but not one 256-bit AVX. In order to do AVX, the unit will split the operations accordingly. On the counter side each core will have 2 AES units for cryptography as well as decode support for SSE, AVX1/2, SHA and legacy mmx/x87 compliant code."

(http://www.anandtech.com/show/11170/the-amd-zen-and-ryzen-7-review-a-deep-dive-on-1800x-1700x-and-1700/8)


So it can do AVX2, but the questions remain, is it a hassle and how big is the throughput. My impression of Ryzen it has a better performance in applications than games, compared to Intel. In Blender and Win-RAR it looks fine, in POV-Ray, WinZIP and CineBench 15 SMT it outpaces Intel by a nice gap. It rules AES encoding. But then Hashcat is its own beast and hopefully someone here is getting such a CPU in the recent future, so we know if it's worth a thought.

[epixoip]

Huh, yeah that's super strange. It's almost like AVX2 emulation.

[blazer]

epixoip is correct. It is AVX2 emulation. There is no dedicated AVX2 hardware, the two 128-bit FMACs fuse to carry out AVX2 instructions, so you are looking at half rate AVX2 on Ryzen.

I've got a 1800x sitting on my desk but board has not arrived so I can't run any tests, I did see a benchmark of bcrypt using JTR and the 1800x out performed the 5960x, though i'm not sure whether AVX2 is used there. (see http://www.phoronix.com/scan.php?page=ar...inux&num=4)

Whats interesting about Ryzen is that is has dedicated SHA instructions so that could yield interesting results.

[NikosD]

The performance of RyZen in AES is amazing:



but not as much as SHA:

[Flomac]

Interesting to see - blazer, any news of your mobo? I'm curious about the benchmarks

AIDA64 - CPUHash

"This integer benchmark measures CPU performance using the SHA1 hashing algorithm defined in the Federal Information Processing Standards Publication 180-3 (http://csrc.nist.gov/publications/fips/f..._final.pdf). The code behind this benchmark method is written in Assembly, and it is optimized for every popular AMD, Intel and VIA processor core variants by utilizing the appropriate MMX, MMX+/SSE, SSE2, SSSE3, AVX or XOP instruction set extension. ...

In this benchmark every thread is working on independent 8 KB data blocks, and the MMX, SSE2, SSSE3, AVX or XOP optimized calculation routines implement the latest vectorization idea of Intel (http://software.intel.com/en-us/articles...gorithm-1/)."

[NikosD]

AIDA64 - CPUHash

SHA instructions set was introduced by Intel at late 2016 releasing 2nd generation Atom (Goldmont) CPUs.

But Intel has never implemented those instructions ever since, so there is no "HW" acceleration of those SHA instructions in Intel's desktop/ server CPUs.

RyZen CPUs are the first ones to introduce a 2nd AES unit inside and SHA specific hardware implementation for the execution of that instruction set.

AIDA64 leverages that specific hardware, executing in native form the SHA instructions and the difference is huge, as you can clearly see.